Electrical problems can also occur when electronic devices operate at high speeds. Higher speeds generally mean greater data throughput, which is a potential driver for advancing mobile network standards such as the latest 5G. 5G PCB design requires various processes during layout and manufacturing to ensure that high-speed signals do not lose effectiveness as they pass through the circuit board’s conductor surface.
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Signal loss analysis in 5G PCB design
Taking advantage of 5G’s increased transmission speeds requires understanding how PCB materials respond to high-speed signals. The dissipation factor (Df value or Df for short) represents the loss property of the material and is calculated as the reciprocal of its quality factor. The Df of material is frequency dependent, and as data transmission speeds increase, more energy is lost into the surrounding material and dissipated as heat. Therefore, materials for 5G circuits need to be less lossy than standard FR4 (for example) to promote signal integrity and limit heat-related aging.
Dielectric loss includes dissipation factor and dielectric constant (Dk, also known as relative permittivity). Conductor losses combine losses due to scattering and skin effect. Skin depth decreases with increasing frequency, and conductor losses are mainly caused by scattering.
While Dk and Df will vary with environmental conditions (temperature, relative humidity, etc.), the most important factor will be the properties of the board material. The combination of low Df and Dk values will ensure that the 5G board achieved through material properties and structure (for example, tightness of the fiberglass weave) will ensure minimal losses at high speeds.
However, low Dk values also mean longer wavelengths at the same frequency, which can affect routing difficulty. To be sure, this difference becomes less noticeable (absolutely) at higher frequencies as the wavelength scales down. Still, engineers and designers need to be aware that board area may have to increase to accommodate layout differences for low-dk materials.
Returning to conductor losses, scattering from the conductor surface increases and increases due to a decrease in signal phase velocity resulting in a rough, uneven surface. A logical solution is to reduce this roughness by changing the electroplated copper process to rolled and annealed copper foil with a smoother profile. However, a rough copper surface is a desirable manufacturing attribute because of improved adhesion between the base and conductor materials.
Therefore, manufacturers need to balance performance goals and manufacturability. In addition to replacing the plating process with copper foil, adhesives can be applied to the substrate-conductor matrix to increase peel strength and prevent delamination events.
How does it affect 5G performance?
5G PCB design must also focus on field use. While the manufacturer’s material information provides a very important basis for selection, how these products respond to high-speed factors can significantly change transmission line losses.
Humidity: A circuit board’s “standard” Dk and Df values can change significantly when exposed to an environment with sufficient relative humidity. For example, while FR4 is a terrible material for 5G applications, it is a good example of how circuit boards can swell and cause significant changes in transmission line performance. Manufacturers will need to test boards for a variety of potential end-use environments.
Temperature: The dielectric constant of most materials changes with temperature. Therefore, it is the magnitude of this change, the rate at which Dk grows or decays. Strong candidate materials for 5G boards exhibit minimal material property growth or decay under changes in operating temperature.
Tighter tolerances for most high-speed board materials will aid in modeling a variety of environments. While most general-purpose circuit board materials have significant fluctuations in performance metrics (sometimes 5% or greater), high-speed materials can exhibit a more reasonable ~<2% variation during production. For design teams, this greatly simplifies the build process in multiple environments because there is additional room between ideal values in test settings and values encountered during use.
